Title: Computer Basics
Reading: Computer Basics Supplement pp 1-11
I. Objectives
Understand binary numbering and the number of possible combinations associated with bits and bytes
Know the three basic components of a computer
Understand basic bus architecture
Know what limits overall processing speed
Describe the characteristics of basic memory systems
Know the characteristics of various I/O interfaces
II. Introduction
Modern combat systems rely heavily on computers for their success.
In fact in some ways it can be argued that the modern weapon system
is actually built around the central computer which has become
the most important piece of equipment in the system.
Functions of computers:
Internal all computers work in a binary, digital environment i.e. 0,1 on/off
So lets review what a binary system of numbers is:
binary is base 2 we are familiar with base 10
binary only has 2 numbers 0 and 1
all other numbers are represented by combinations of 0 and 1 (see
example p2)
each digit is a power of 2 i.e. units are 20, tens are 21, hundreds are 22 etc
so the number 1001101 is 1 x 26 + 1 x 23 +
1 x 22 + 1 x20 = 64 + 8 + 4 + 1 = 77
Bits and Bytes
Each digit in a binary number is called a bit. Computer
are designed to operate with an expected number of bits. They
started as 8-bit machines and now are up to 64-bit Nintendos.
Each set of 8 bits is called a byte.
In an 8 bit machine, we have 8 digits , so the maximum number of combinations available are 27 + 26 + 25 + 24 + 23 + 22 + 21 + 20 = 128 + 64 + 32 + 16 + 8 + 4 + 2 + 1 + all zeros = 256
In general the formula is
N = 2b
where N = number of combinations (or numbers)
and b= number of bits the more bits, the more combinations
Two bytes together as in a 16 bit machine make up a word , 32
bit machines are 4 bytes which is a double word and 64 bit machines
are 8 bytes which is a quad word.
Components
Computers vary but all will have some basic components such as
a CPU, memory, interconnecting bus and an input/output (I/O) interface.
CPU:
This performs the operations.
Binary at most fundamental level.
Truth tables (see p4)
AND, NOT, +, -, ,
(if you add two numbers which together exceed the bit capability
of the machine you get the classic "overflow error"
Inside the CPU are four components:
CPU operates on a 3 step cycle
Fetch - obtain next instruction and store
Decode - interpret instruction and collect any other necessary data
Execute - carry out the instruction and store result in internal
memory
BUS:
Connects all components. Three parts:
Address Bus
Data Bus
Control Bus
BUS works on a 4 step cycle
The location of the data is placed on address bus
The address is stored in temporary memory (frees address bus)
Data is retrieved and placed on data bus
Data is sent to CPU
The timing of the bus is controlled by a clock. e.g. 200 MHz means 200,000,000 clock cycles per second. Each clock cycle is a step in the operating process. So 200M steps/sec
Each step could involve 64 bits so you could have 64 x 200M =
12.8 gigabits/sec
MEMORY
ROM - Read only memory - programmed by UV light (EPROM) or voltage
(EEPROM) e.g. CD-ROM's
RAM - Random Access Memory - read and write capability
2 types of RAM
SRAM - Static RAM - stays even after power is turned off - doesn't require refreshing
DRAM - Dynamic RAM - requires constant refreshing
Access time: time it takes to retrieve a piece of data. SRAM is faster but more expensive and larger
If the access time is longer than a clock cycle then the system has to build in a pause while waiting for the memory to access.
e.g. a Pentium 233MHz system has a clock cycle of 1/233MHz = 4
ns which means it can perform an operation every 4 ns. If the
memory access time is 10 ns the system has to wait 6 ns between
operations in order to wait for the memory to access.
Capacity: how much data can be stored. Measured in bytes
(8 bits)
Transfer Mode: how data is sent after first request (eliminates cycles)
EDO - 2 cycles after first request
Cache: high-speed (low access time) memory of limited capacity.
(SRAM) It stores most frequently accessed data to save time. System
checks cache first then RAM
I/O:
Modems, Monitors, Hard Disks, CD-ROM's, Mouse, Keyboard, Printer,
etc
You can have a lot of compatibility problems with I/O devices
because they are all built by different manufacturers, are usually
analog and there is no industry standardization of the interfaces.
Serial Mode - all the bits are sent on 1 line, in order. Slow
Parallel Mode - bits are sent on separate lines (e.g. 32 bit -
32 lines) Fast
Synchronous Transfer - the I/O device and the CPU keep a common timing between them so that data can be sent at any time.
Asynchronous requires a start and stop command to let the computer
know that data is coming.